Startup packs 1000 RISC-V cores into AI accelerator chip - Embedded.com
Reduced instruction set computer - Wikipedia
New Part Day: A RISC-V CPU For Eight Dollars | Hackaday
SiFive unveils plan for Linux PCs with RISC-V processors | VentureBeat
Ventana Micro Launches Server-Class RISC-V CPU, Challenging Arm
RISC-V: More Than a Core
SiFive Unveils 64-Bit RISC-V Server Core - EE Times Asia
Pineapple: 32-bit RISC-V CPU that you can make at home - YouTube
Intel to make a custom SiFive-based RISC-V CPU, will be fabricated on a 7 nm node in a first step towards competing directly with Arm-based chips - NotebookCheck.net News
SiFive Announces First RISC-V OoO CPU Core: The U8-Series Processor IP
![RISC-V Architecture Training] @DEMO: PK (proxy kernel) and FESVR (front-end server) - When Moore's Law ENDS](https://phdbreak99.github.io/riscv-training/image/fesvr-diagram.png "RISC-V Architecture Training] @DEMO: PK (proxy kernel) and FESVR (front-end server) - When Moore's Law ENDS")
RISC-V Architecture Training] @DEMO: PK (proxy kernel) and FESVR (front-end server) - When Moore's Law ENDS
RISC-V Exchange: Available Boards – RISC-V International
RISC-V ready to come of age - Embedded.com
SiFive Pushes Open Source RISC-V Silicon Closer to Prime Time | Data Center Knowledge | News and analysis for the data center industry
Alibaba's new 16-core CPU will challenge Intel Xeon in datacenters | TechRadar
The First RISC-V Shot Across The Datacenter Bow
New RISC-V CPU claims recordbreaking performance per watt | Ars Technica
RISC-V Architecture To Tackle AMD & Intel x86 Chips With 192 Cores Built on 5nm Process Node
RISC-V Universe Grows with New GPUs, CPUs, and Development Kits - News
Board gives you 1GHz 64bit RISC-V CPU for embedded Linux PC
RISC-V ISA - MIPS
